1. Field of the Invention
The present invention relates to a driving circuit, more particularly an AC driving circuit, for driving a display panel such as a liquid crystal display panel, and to a display apparatus using the driving circuit.
2. Description of the Related Art
A liquid crystal display panel of the active matrix type has a matrix of pixels, each of which includes a liquid crystal layer and an active element such as a thin-film transistor (TFT) for controlling the electric field applied to the liquid crystal layer. The driving circuit includes a gate driver and a source driver. The gate driver supplies control signals through scan lines (gate lines) to control the on/off-state of each active element. The source driver applies analog gray-scale voltages through data lines (source lines) to pixel electrodes. The liquid crystal layer of each display pixel is sandwiched between a pixel electrode on one side and an opposing electrode on the opposite side. An AC driving method is widely used, in which the polarity of the gray-scale voltage is reversed periodically, typically once per frame or field in the image signal. The resulting periodic reversal of the direction of the electric field applied to the liquid crystal layer prevents the degradation of the liquid crystal layer that would occur if a gray-scale voltage including a DC voltage component of constant polarity were to be applied continuously. In a variation of the AC driving method referred to as dot inversion, the gray-scale voltage reverses between positive and negative polarity at every pixel (dot), or every few pixels. In another variation referred to as line inversion, the gray-scale voltage reverses between positive and negative polarity in alternate scan lines or data lines.
When the AC driving method is used in the source driver, the source driver typically has an impedance conversion circuit including two operational amplifiers connectable to each data (source) line. One operational amplifier (referred to below as the high-side operational amplifier) outputs an analog gray-scale voltage of positive polarity; the other operational amplifier (referred to below as the low-side operational amplifier) outputs an analog gray-scale voltage of negative polarity. Source drivers having such impedance conversion circuits are disclosed in Japanese Patent Application Publication Nos. 2006-292807, 1998-062744, and 2005-266738.
A problem that occurs in a source driver operating by the AC driving method will be described below with reference to the schematic circuit diagram of part of a source driver in FIG. 1. The impedance conversion circuit 100 in FIG. 1 includes a low-side operational amplifier 100A and a high-side operational amplifier 100B. The low-side operational amplifier 100A is a non-inverting amplifier powered by a power supply voltage VSS and a common power supply voltage VMM higher than the power supply voltage VSS. The high-side operational amplifier 100B is a non-inverting amplifier powered by the common power supply voltage VMM and a power supply voltage VDD higher than the common power supply voltage VMM. The low-side operational amplifier 100A outputs an analog gray-scale voltage of negative polarity (equal to or lower than the common voltage VMM) from an output terminal NA. The high-side operational amplifier 100B outputs an analog gray-scale voltage of positive polarity (equal to or higher than VMM) from an output terminal NB.
As shown in FIG. 1, the output terminal NA of the low-side operational amplifier 100A and the output terminal NB of the high-side operational amplifier 100B are connected through an output switching circuit 200 to a pair of data lines 31A, 31B. The output switching circuit 200 has switches 201, 202, 203, 204 that open and close responsive to switch control signals Sa, Sb, Sc, Sd. Switch control is performed so that when switches 201, 204 are in the on-state, switches 202, 203 are in the off-state, and when switches 201, 204 are in the off-state, switches 202, 203 are in the on-state.
During the transition from one image display period (for example, frame period or field period) Ti to the next image display period T1+1, switches 201, 204 are switched from the on-state to the off-state and switches 202, 203 are switched from the off-state to the on-state. This switchover connects data line 31A, which had been receiving an analog gray-scale voltage of negative polarity and is still at a relatively low voltage level, to the output terminal NB of the high-side operational amplifier 100B, so the voltage level at this output terminal NB may temporarily drop below the common power supply voltage VMM. At the same time data line 31B, which had been receiving an analog gray-scale voltage of positive polarity and is still at a relatively high voltage level, is connected to the output terminal NA of the low-side operational amplifier 100A, so the voltage level at this output terminal NA rises and may temporarily exceed the common power supply voltage VMM. As a result, parasitic diodes 101a, 101b present inside the operational amplifiers 100A, 100B may become forward biased and allow excessive current to flow, possibly damaging the operational amplifiers 100A, 100B.